Flip chip assembly technology is widely utilized in semiconductor packaging due to its short interconnect paths between flip chip dies and a substrate, which eliminates the space needed for wire bonding and thus reduces the overall size of the package. In addition, the elimination of wire bonds reduces undesired parasitic inductance, thereby making the package configuration attractive for high-frequency applications.
In general, a flip chip die has a die body and multiple interconnect structures that are used to attach the flip chip die to the substrate. Each interconnect structure includes a solder and a pillar extending outward from the die body to the solder. In flip chip assembly, reflowing solders of the interconnect structures is one of the process steps used to connect each interconnect structure to a corresponding metal structure on a top surface of the substrate. Due to cost and performance considerations, the pillar of each interconnect structure and the corresponding metal structure are formed of copper. During the reflowing step, the solder of each interconnect structure will turn into a liquid-phase and flow along the most active surface. Since the pillar and the corresponding metal structure are formed from a common material—copper, there is a risk that the liquid phase solder will flow back to the flip chip die along the pillar and short circuits on the flip chip die.
To address this issue, a surface finish is applied to the metal structure to increase its surface activity. One possible surface finish formed of gold will effectively pull the liquid-phase solder onto the metal structure and prevent the liquid-phase solder from flowing up the pillar back to the flip chip die. Normally, applying the gold surface finish to the metal structure is provided by electrolytic plating, which requires bus bars around the metal structure for routing electrical potential and current during the plating process. However, these bus bars will significantly increase the size of the package. In addition, the gold surface finish is expensive, which will raise the cost of the final product.
Accordingly, there remains a need for improved substrate structure designs to reduce the possibility of the solder flowing back to the flip chip die and without significantly increasing the package size. Further, there is also a need to keep the final product cost effective.